High Speed, Low Noise Integrated Circuits for Experiments at LHC/SSC Colliding Beams

Experiments to be performed at future high energy colliding beams facilities such as the Large Hadron Collider (LHC) and the Superconducting Super Collider (SSC) will use 10⁶--10⁷ high speed sensors. A wide range of high speed, low noise, and low power mixed analog/digital systems are being developed for the readout of these sensors. Highlights of these systems include a 12 bit, 60 Megahertz 16 channel 256 deep analog memory with on chip A/D, a floating-point flash ADC to achieve very large dynamic range, and a fast low power system for time measurement.