A CMOS High-Speed D/A Conversion System with an Embedded Programmable Video Fir Filtering Function

This paper describes a high-speed D/A conversion system with an embedded 5-bit programmable FIR filtering function suitable for applications in video interfaces. For demonstration purposes a prototype chip has been fabricated in a digital 1.2 ¿m single-poly CMOS technology for realizing the combined functions of an 8-bit current-steering D/A conversion and a 3-tap color carrier suppression filtering. At a data delay frequency of 18 MHz and 54 MHz conversion rate, the chip consumes 115 mW for a full-scale output current of 13.3 mA and a 5 V supply.