• DocumentCode
    516627
  • Title

    High Speed CMOS Adder and Multiplier Modules for Digital Signal Processing in a Semicustom Environment

  • Author

    Kernhof, Juergen ; Beunder, Mike ; Hoefflinger, Bernd

  • Author_Institution
    Institut fuer Mikroelektronik Stuttgart, Allmandring 30, 7000 Stuttgart SO, West-Germany
  • fYear
    1988
  • fDate
    21-23 Sept. 1988
  • Firstpage
    62
  • Lastpage
    65
  • Abstract
    For the realization of digital filters in a semicustom environment high performance adder and multiplier modules have been developed. The GATE FOREST semicustom environment supports the implementation of dynamic (Domino) CMOS logic circuits. This circuit design technique is applicable for compact high speed designs. The realized dynamic adder architecture consists of a two bit group adder and a Manchester Carry Chain. For a N bit addition this results in a N/2 bit carry look ahead path. The multiplier module is a combination of a Modified Booth coded static adder array with a final dynamic Manchester Carry Chain adder. The multiplier is clocked with a single (symmetric) clock signal. The clock signal is divided into a precharge phase in wich the static part of the multiplier adder array is evaluated and an evaluation phase for the generation of the multiplication result. A 16 bit * 16 bit multiplier based on this architecture runs with a 40 MHz system clock. The first chips have been processed in a 2 ¿m CMOS double metal technology.
  • Keywords
    Adders; CMOS logic circuits; CMOS process; CMOS technology; Circuit synthesis; Clocks; Digital filters; Digital signal processing; Phased arrays; Signal generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1988. ESSCIRC '88. Fourteenth European
  • Conference_Location
    Manchester, UK
  • Type

    conf

  • Filename
    5468439