DocumentCode :
516724
Title :
Compact Modelling of Submicron CMOS
Author :
Klaassen, D.B.M.
Author_Institution :
Philips Research Laboratories, Eindhoven, The Netherlands
fYear :
1996
fDate :
17-19 Sept. 1996
Firstpage :
40
Lastpage :
46
Abstract :
The accuracy of present-day compact MOS models and relevant benchmark criteria are reviewed. The impact on compact modelling of new CMOS applications and the rapid progress in process technology towards dimensions of 0.1 micron, will be discussed.
Keywords :
Application software; Benchmark testing; CMOS integrated circuits; CMOS process; CMOS technology; Integrated circuit modeling; Integrated circuit technology; Semiconductor device modeling; Solid modeling; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1996. ESSCIRC '96. Proceedings of the 22nd European
Conference_Location :
Neuchatel, Switzerland
Print_ISBN :
2-86332-197-8
Type :
conf
Filename :
5468586
Link To Document :
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