Title :
A 3.3V Power Adaptive 1244 / 622 / 155 MHz PLL
Author :
Belot, D. ; Dedieu, S. ; Dugoujon, L.
Author_Institution :
SGS-THOMSON, 850, Rue Jean Monnet BP 16 - 38921 Crolles, France
Abstract :
A power adaptive PLL for B-ISDN multi-rate [1] transmitter implementation in 0.5¿m BiCMOS is described. The PLL power consumption matches the data rate by using a novel type ECL library. 210mW@ 155MHz to 320mW@ 1.2GHz total power is achieved. 17ps jitter at 1.2GHz is measured. Fast time to Silicon was performed by a Full Top-down design methodology.
Keywords :
B-ISDN; BiCMOS integrated circuits; Design methodology; Energy consumption; Jitter; Libraries; Phase locked loops; Power measurement; Silicon; Transmitters;
Conference_Titel :
Solid-State Circuits Conference, 1996. ESSCIRC '96. Proceedings of the 22nd European
Conference_Location :
Neuchatel, Switzerland
Print_ISBN :
2-86332-197-8
