• DocumentCode
    516783
  • Title

    A 0.8μm CMOS Programmable Analog-Array-Processing Vision-Chip with Local Logic and Image-Memory

  • Author

    Espejo, S. ; Carmona, R. ; Domínguez-Castro, R. ; Rodríguez-Vázquez, A.

  • Author_Institution
    Centro Nacional de Microelectr?nica-Universidad de Sevilla, Dept. of Analog Design, Edificio CICA, C/ Tarfia sn, 41012-Sevilla, SPAIN. Phone: +34 5 4239923, FAX: +34 5 4231832, email: espejo@cnm.us.es
  • fYear
    1996
  • fDate
    17-19 Sept. 1996
  • Firstpage
    280
  • Lastpage
    283
  • Abstract
    An operational vision-chip prototype with a wide-range of potential applications in artificial-vision systems is presented. Its functionality includes concurrent image-transduction, programmable image-processing, image-storage, and algorithmic control over a network of 20 × 22 identical cells. The prototype has been designed and manufactured in 0.8μm CMOS standard technology, and has a total area of 30mm2. Experimental results are reported.
  • Keywords
    Analog computers; Bifurcation; CMOS logic circuits; CMOS technology; Cellular neural networks; Control systems; Image storage; Integrated circuit interconnections; Layout; Prototypes;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1996. ESSCIRC '96. Proceedings of the 22nd European
  • Conference_Location
    Neuchatel, Switzerland
  • Print_ISBN
    2-86332-197-8
  • Type

    conf

  • Filename
    5468646
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=516783