Title :
10 Gbit/s Throughput Telecommunication Circuits in CMOS
Author :
Edman, Anders ; Rudberg, Björn
Author_Institution :
Electronic Devices, Dept. of Physics, Linköping University, S-581 83 Linköping, Sweden. ase@ifm.liu.se
Abstract :
We present an architecture suitable for implementing the processing parts of high throughput telecommunication terminal equipment, in standard CMOS. A first testchip has been designed in 0.8 ¿m CMOS and successfully tested. It contains some critical processing parts of an SDH-regenerator. The chip process a throughput of 10 Gbit/s and is fully clocked at 622 MHz.
Keywords :
CMOS process; Circuit testing; Clocks; Frequency; High speed optical techniques; Repeaters; Routing; Synchronous digital hierarchy; Throughput; Wires;
Conference_Titel :
Solid-State Circuits Conference, 1996. ESSCIRC '96. Proceedings of the 22nd European
Conference_Location :
Neuchatel, Switzerland
Print_ISBN :
2-86332-197-8
