Title :
A 16K CMOS Static RAM
Author :
Dingwall, A. ; Leung, B. ; Nguyen, H. ; Blackstone, S.
Author_Institution :
Solid State Technol. Center, RCA Corp., Somerville, NJ, USA
Abstract :
A fully static 2Kx8 CMOS RAM using a 6 transistor cell, with internally clocked low power circuits was fabricated with a dense double level polysilicon process. This RAM design has a typical access time of 75 nsec, a 10 mW operating power and a 100 nW standby power.
Keywords :
CMOS integrated circuits; SRAM chips; 16K CMOS static RAM design; 6 transistor cell; dense double level polysilicon process; internal clocked low power circuits; power 10 mW; power 100 nW; Aluminum; Ceramics; Chip scale packaging; Circuits; Plastic packaging; Power amplifiers; Random access memory; Read-write memory; Variable structure systems; Voltage-controlled oscillators;
Conference_Titel :
Solid-State Circuits Conference, 1982. ESSCIRC '82. Eighth European
Conference_Location :
Brussels
