• DocumentCode
    516908
  • Title

    A 300K Transistor NMOS Peripheral Processor

  • Author

    Pomper, M. ; Stockinger, J. ; Augspurger, U. ; Müller, B. ; Schwabe, U.

  • Author_Institution
    Siemens AG, Munich, W. Germany
  • fYear
    1983
  • fDate
    21-23 Sept. 1983
  • Firstpage
    73
  • Lastpage
    76
  • Abstract
    This paper describes the design and performance of a 16-bit microprocessor chip integrating more than 300K transistors on an area of 105 mm2. The circuit has a large on-chip microprogram memory and is used for special peripheral control applications. A 2-um NMOS technology with polycide gates and two metal layers has been applied. The circuit operates at 25 MHz with a typical instruction cycle time of 200 ns.
  • Keywords
    Circuits; Decoding; Erbium; Helium; MOS devices; Microprocessor chips; Programmable logic arrays; Registers; Transistors; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1983. ESSCIRC '83. Ninth European
  • Conference_Location
    Lausanne, Switzerland
  • Print_ISBN
    2-88074-021-5
  • Type

    conf

  • Filename
    5468916