• DocumentCode
    516910
  • Title

    Subnanosecond 8 Bit Normally-Off GaAs SRAM

  • Author

    Frey, Pierrette ; Gabillard, Bertrand ; Rocchi, Marc

  • Author_Institution
    Laboratoires d´´Electronique et de Physique Appliqu?e, 3, avenue Descartes, 94450 Limeil-Br?vannes, France
  • fYear
    1983
  • fDate
    21-23 Sept. 1983
  • Firstpage
    65
  • Lastpage
    68
  • Abstract
    This paper presents the design and fabrication of the first subnanosecond 8 bit - Normally-off GaAs SRAM ever reported. The fabrication process based on 0.9 ¿m long recessed gate MESFET´s utilises only one active layer. Its simplicity makes it easily adaptable to much higher density circuits. The 8 bit - SRAM has yielded an access time of 0.9 ns for a corresponding power consumption (output buffer excluded) of 6.5 mW.
  • Keywords
    Circuits; Decoding; Energy consumption; Fabrication; Gallium arsenide; Implants; MESFETs; Metallization; Random access memory; Read-write memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1983. ESSCIRC '83. Ninth European
  • Conference_Location
    Lausanne, Switzerland
  • Print_ISBN
    2-88074-021-5
  • Type

    conf

  • Filename
    5468918
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=516910