A Pipelined Array Product Accumulator in Dynamic NMOS for Efficient Signal Processing

The inner product of two vectors, often in the form of a weighed sum of variables, is an essential operation in signal processing (convolution, correlation, DFT) and matrix computations [1,2] . In the required sum of productsΣEA_iB_i (i=1,..,N) the individual products A_iB_i and the subtotals during accumulation are of no interest. Hence it is wasteful to ripple out carries at each product and accumulation. A considerable gain in efficiency can be obtained by this choice of the sum of products (instead of a single multiplication) as basic operation. By a combination of parallel and pipeline processing it is possible to make a high throughput LSI vector multiplier in a medium speed technology with low power dissipation such as dynamic NMOS.