Title :
EPISODE, A Set of Tools Oriented to Logic Integrated Circuit Design Verification and Testing
Author :
Chicotx, C. ; Thuel, J. ; Tulloue, R.
Author_Institution :
LAM, Montpellier, France
Abstract :
The main features of the EPISODE system of logic simulators are described. Its use during circuit design process and its extensions for the simulation of very large scale integrated circuits are presented.
Keywords :
VLSI; integrated circuit design; integrated circuit testing; integrated logic circuits; logic simulation; EPISODE system; logic integrated circuit design testing; logic integrated circuit design verification; logic simulators; very large scale integrated circuit simulation; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Integrated circuit synthesis; Integrated circuit testing; Logic circuits; Logic design; Logic testing; System testing;
Conference_Titel :
Solid State Circuits Conference, 1976. ESSCIRC 76. 2nd European
Conference_Location :
Toulouse
