DocumentCode
517042
Title
A C-MOS/SOS Technology for Radiation Tolerant Devices
Author
Pinel, J. ; Charlot, J.M. ; Suat, J.P. ; Borel, J.
fYear
1976
fDate
21-24 Sept. 1976
Firstpage
78
Lastpage
79
Abstract
The complementary MOS structure advantages for space and/or military applications are well known. The important qualities of these structures are low standby power, high immunity and insensitivity to power supply voltage. More, under transient ionizing radiation the complementary structure offers a partial inherent compensation of the photo- currents at the output. The SOS (Silicon on Sapphire) technology appears as the best technology for solving this problem. A test vehicle was constructed with the C-MOS/SOS technology developed at LETI, to evaluate the level of ionizing radiation tolerance. It includes 2-P channel and 2-N channel transistors, 3 inverters, 3 ring oscillators (25 stages) and 2-4-8 divider (Fig. 1).
Keywords
CMOS integrated circuits; invertors; silicon-on-insulator; 2N channel transistors; 2P channel transistors; CMOS-SOS technology; complementary MOS structure; divider; inverters; power supply voltage; radiation tolerant devices; ring oscillators; silicon on sapphire technology; transient ionizing radiation tolerance; Degradation; Dielectric thin films; Inverters; Ionizing radiation; Isolation technology; MOSFETs; Photoconductivity; Silicon; Space technology; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Circuits Conference, 1976. ESSCIRC 76. 2nd European
Conference_Location
Toulouse
Type
conf
Filename
5469085
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