DocumentCode :
517059
Title :
A 64K CMOS RAM with Low Power Circuit Technology
Author :
Kumagai, Yutaka ; Sato, Yukio ; Yamada, Hitoshi ; Umezawa, Noboru ; Okada, Noriaki ; Arimatsu, Akira
Author_Institution :
Oki Electric Co., Ltd., Hachioji, Japan
fYear :
1983
fDate :
21-23 Sept. 1983
Firstpage :
11
Lastpage :
14
Abstract :
A fully static 64K CMOS RAM, fabricated by double polysilicon and double well CMOS technology with an internal dynamic circuit and block-select circuitry technique, will be described.
Keywords :
CMOS memory circuits; CMOS process; CMOS technology; Capacitance; Circuit simulation; Driver circuits; Pulse amplifiers; Random access memory; Read-write memory; Semiconductor device measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1983. ESSCIRC '83. Ninth European
Conference_Location :
Lausanne, Switzerland
Print_ISBN :
2-88074-021-5
Type :
conf
Filename :
5469104
Link To Document :
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