DocumentCode
517110
Title
1024-Bit Fully Decoded MNOS Non-Volatile Memory
Author
Bostock, D.
Author_Institution
Allen Clark Res. Centre, Plessey Co. Ltd., Towcester, UK
fYear
1976
fDate
21-24 Sept. 1976
Firstpage
42
Lastpage
43
Abstract
A 1024-bit fully decoded MNOS memory is described which is fabricated using silicon-on-sapphire technology to provide the required isolation between the MNOS memory array and the decoding circuitry.
Keywords
MIS structures; random-access storage; silicon-on-insulator; MNOS memory array; decoding circuitry; fully decoded MNOS non volatile memory; silicon on sapphire technology; Bidirectional control; Circuits; Control systems; Decoding; Isolation technology; MOSFETs; Nonvolatile memory; Registers; Threshold voltage; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Circuits Conference, 1976. ESSCIRC 76. 2nd European
Conference_Location
Toulouse
Type
conf
Filename
5469232
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