• DocumentCode
    517171
  • Title

    An 1.5 V Cyclic A/D Converter in Standard CMOS Technology

  • Author

    Hammerschmidt, D. ; Brockherde, W. ; Hosticka, BJ ; Kokozinski, R. ; Schnatz, F.V.

  • Author_Institution
    Fraunhofer Institute of Microelectronic Circuits and Systems (FhG IMS), Duisburg, Germany
  • fYear
    1995
  • fDate
    19-21 Sept. 1995
  • Firstpage
    142
  • Lastpage
    145
  • Abstract
    A low-cost 1.5 V A/D converter has been realized in standard CMOS technology. It is based on a novel low-voltage switched-capacitor technique with a differential signal path. The conversion is programmable and insensitive to the capacitor ratio and the amplifier offset voltage. A complete n-bit conversion needs 3n clock cycles. The chip area is 6.8 mm2 in a 1.5 ¿m CMOS technology with threshold voltages of 0.8V.
  • Keywords
    CMOS technology; Capacitors; Circuits; Clocks; Linearity; Low voltage; Operational amplifiers; Power dissipation; Switches; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1995. ESSCIRC '95. Twenty-first European
  • Conference_Location
    Lille, France
  • Print_ISBN
    2-86332-180-3
  • Type

    conf

  • Filename
    5469306
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=517171