Hardware efficient architectures of improved Jacobi method to solve the eigen problem

Eigenvalue computation is essential in many fields of science and engineering. For high performance and real-time applications, it needs to be carried out in hardware. This paper focuses on the exploration of an efficient hardware architecture which computes eigenvalues of symmetric matrices based on Jacobi method. The proposed architecture is more efficient than previous architectures reported in the literatures, mainly due to the use of the CORDIC algorithm and the improvement of the double rotation in Jacobi algorithm. The whole system has been carried out on FPGA´s by using the VHDL language, attempting to optimize the design.