DocumentCode :
518582
Title :
Feasibility study of a CMOS-compatible integrated solar photovoltaic cell array
Author :
Plesz, B. ; Juhász, L. ; Mizsei, J.
Author_Institution :
Dept. of Electron Devices, Budapest Univ. of Technol. & Econ. (BME), Budapest, Hungary
fYear :
2010
fDate :
5-7 May 2010
Firstpage :
403
Lastpage :
406
Abstract :
Due to the low power consumption of sensors resulted by recent developments solar energy seems to be an attractive power source for self-powered devices. A proposal of a chip-scale solar module was given by Perlaky et al, containing a possible structure and a model for the proposed structure. This paper gives a more sophisticated model of the structure proposed in by taking into account the parasitic transistor present in the structure. Based on this model simulations are performed and some crucial issues of the structure are detected. Finally a modified structure of a chip-scale solar module is presented, that incorporates solutions for the issues found during simulations.
Keywords :
CMOS integrated circuits; photovoltaic cells; power consumption; solar cell arrays; transistors; CMOS-compatible integrated solar cell array; chip-scale solar module; parasitic transistor; power consumption; solar photovoltaic cell array; Energy consumption; Intelligent sensors; P-n junctions; Photoconductivity; Photovoltaic cells; Photovoltaic systems; Sensor arrays; Solar energy; Solar power generation; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Test Integration and Packaging of MEMS/MOEMS (DTIP), 2010 Symposium on
Conference_Location :
Seville
Print_ISBN :
978-1-4244-6636-8
Electronic_ISBN :
978-2-35500-011-9
Type :
conf
Filename :
5486515
Link To Document :
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