DocumentCode
518666
Title
A high-efficiency cross-coupled charge pump for flash memories
Author
Wang, Yi-Ran ; Yu, Zong-Guang
Author_Institution
Coll. of Inf. Eng., Jiangnan Univ., Wuxi, China
Volume
3
fYear
2010
fDate
27-29 March 2010
Firstpage
130
Lastpage
133
Abstract
This paper presents a new cross-coupled charge pump structure which generates 2Vdd output and applies to flash memory. Compared with conventional structures, the novel scheme has lower ripple voltage, and higher efficiency. These advantages were achieved by employing the methods of reducing power loss effectively. The proposed charge pump was fabricated with TSMC 0.18 μm CMOS process. By the simulation of HSPICE, it shows that the new scheme could operate at a supply voltage as low as 0.9 V with the maximum efficiency of 91.82%.
Keywords
CMOS memory circuits; charge pump circuits; flash memories; CMOS process; TSMC; cross coupled charge pump structure; flash memory; power loss reduction; ripple voltage; size 0.18 mum; CMOS process; Capacitors; Charge pumps; Circuit simulation; Clocks; Educational institutions; Flash memory; Nonvolatile memory; Semiconductor devices; Threshold voltage; charge pump; efficiency; flash memory; power loss;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Computer Control (ICACC), 2010 2nd International Conference on
Conference_Location
Shenyang
Print_ISBN
978-1-4244-5845-5
Type
conf
DOI
10.1109/ICACC.2010.5486757
Filename
5486757
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