A hierarchical cluster-based optical network-on-chip

Tens, hundreds and even thousands of cores are to be integrated into a single chip. Network on chip appears to offer efficient communication between cores. However, the increased requirement for larger communication bandwidths and lower power consumption challenges the traditional electrical interconnects. Advances in silicon nanophotonics make optical interconnect a promising candidate for network on chip architectures in future. In this paper, we develop a hierarchical cluster-based optical NoC (HCONoC). It is a hybrid electrical/optical on chip network architecture. It connects the lowest level cluster of IP cores with electrical interconnects while optical interconnects are used for inter-cluster communication to improve the efficiency of the network. Three types of routers including electrical and optical router architectures are carefully designed together with an efficient routing algorithm. Packet switching is employed which helps to avoid the overhead of path setup, alleviating the contention. Finally, we simulate the HCONoC for the 64-core architecture and show the network performance including end-to-end delay and network throughput.