• DocumentCode
    519706
  • Title

    The hardware design of algorithm processing and logic control unit for adaptive Polarization Mode Dispersion compensation

  • Author

    Hengying, Xu ; Xia, Zhang ; Jiguang, Han ; Huijuan, Niu ; Chenglin, Bai

  • Author_Institution
    Phys. Sci. & Inf. Eng. Coll., Liao Cheng Univ., Liao Cheng, China
  • Volume
    1
  • fYear
    2010
  • fDate
    21-24 May 2010
  • Abstract
    In order to reduce the number of control instructions DSP issued and the consuming time of PMD compensation, an algorithm processing and logic control unit for first-order and second-order PMD compensation is designed. It plays the functions of DSP´s algorithm processing and FPGA´s logic control adequately. The configuration of the unit, detailed hardware design and experiment result are also given in the paper. The average consuming time of the unit is even shorter than that of existing DSP compensation module. And it has a better compensation effect.
  • Keywords
    adaptive control; adaptive signal processing; digital signal processing chips; field programmable gate arrays; light polarisation; optical dispersion; optical information processing; DSP; FPGA; adaptive polarization mode dispersion compensation; algorithm processing; first-order PMD compensation; hardware design; logic control unit; second-order PMD compensation; Adaptive control; Algorithm design and analysis; Digital signal processing; Field programmable gate arrays; Hardware; Logic design; Polarization mode dispersion; Process control; Process design; Programmable control; DSP; FPGA; adaptive PMD compensation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Future Computer and Communication (ICFCC), 2010 2nd International Conference on
  • Conference_Location
    Wuhan
  • Print_ISBN
    978-1-4244-5821-9
  • Type

    conf

  • DOI
    10.1109/ICFCC.2010.5497712
  • Filename
    5497712