DocumentCode
523036
Title
Early power grid verification under circuit current uncertainties
Author
Ferzli, I.A. ; Najm, Farid N. ; Kruse, L.
Author_Institution
Dept. of ECE, Univ. of Toronto Toronto, Toronto, ON, Canada
fYear
2007
fDate
27-29 Aug. 2007
Firstpage
116
Lastpage
121
Abstract
As power grid safety becomes increasingly important in modern integrated circuits, so does the need to start power grid verification early in the design cycle and incorporate circuit uncertainty of the early stages into useful power grid information. This work adopts the framework of capturing circuit uncertainty via constraints on circuit currents, and follows a geometric approach to transform a problem whose solution requires as many linear programs as there are power grid nodes, to another involving a user-limited number of solutions of one linear system.
Keywords
integrated circuit design; linear programming; power grids; set theory; circuit current uncertainty; design cycle; early power grid verification; integrated circuits; linear programs; power grid information; power grid safety; subset-sum problem; Algorithm design and analysis; Circuit synthesis; Design automation; Linear systems; Permission; Power grids; Routing; Safety; Uncertainty; Voltage; hypercube; hyperplane; power grid; subset-sum problem; vertex;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design (ISLPED), 2007 ACM/IEEE International Symposium on
Conference_Location
Portland, OR
Electronic_ISBN
978-1-59593-709-4
Type
conf
DOI
10.1145/1283780.1283805
Filename
5514261
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