• DocumentCode
    523085
  • Title

    Throughput of multi-core processors under thermal constraints

  • Author

    Rao, Ramesh ; Vrudhula, Sarma ; Chakrabarti, Chaitali

  • Author_Institution
    Consortium for Embedded Syst., Arizona State Univ., Tempe, AZ, USA
  • fYear
    2007
  • fDate
    27-29 Aug. 2007
  • Firstpage
    201
  • Lastpage
    206
  • Abstract
    We analyze the effect of thermal constraints on the performance and power of multi-core processors. We propose system-level power and thermal models, and derive expressions for (a) the maximum number of cores that can be activated, with and without throttling, (b) the speedup (multi-core over single core), and the total power consumption, both as functions of the number of active cores. These expressions involve parameters like power per core, thermal resistance of hottest die block and package, and leakage dependence on temperature. We also computed the above metrics (a) and (b) numerically by solving the detailed Hotspot circuit of an multicore processor driven by a block-level exponential temperature-dependent leakage model. When compared to these numerical results, we found that the above expressions for (a) were at most 8% underpredicted, while those for (b) were accurately predicted. The proposed analytical approach is the first of its kind to relate metrics of interest in multi-core processors to high-level design parameters. Compared to numerical approaches, it provides much faster computation time, and valuable insight for processor designers.
  • Keywords
    approximation theory; microprocessor chips; multiprocessing systems; performance evaluation; design parameter; multicore processor throughput; system level power model; system level thermal model; temperature dependent leakage model; thermal constraint; Circuits; Energy consumption; Multicore processing; Packaging; Performance analysis; Power system modeling; Process design; Temperature dependence; Thermal resistance; Throughput; leakage dependence on temperature; multi-core processors; power; speedup; thermal management; throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Low Power Electronics and Design (ISLPED), 2007 ACM/IEEE International Symposium on
  • Conference_Location
    Portland, OR
  • Electronic_ISBN
    978-1-59593-709-4
  • Type

    conf

  • DOI
    10.1145/1283780.1283824
  • Filename
    5514318