Design of RF digital receiver based on FPGA

According to SDR (software defined radio) theories, digitization of signal processing should approach front-end as much as possible. On the basis of the RF signal features, this paper achieved a digital receiver by RF bandpass sampling directly. A parallel digital down conversion based on polyphase filtering and a multi-channel parallel correlation structure were designed. Digital receiver adopted FIFO as interfaces and DDS mode as analog output. Hardware debugging result showed the feasibility of the digital receiver implementation. Under the situation of hardware structure changelessness, this receiver could be used in other fields by modifying the hardware program with a wide application prospect.