• DocumentCode
    523469
  • Title

    Xilinx Virtex-5 FPGA based video input and output interface design

  • Author

    Wu, Lei ; Yang, Shengqi ; Wang, Xuzhi ; Cheng, Ronghui ; Wan, Wanggen

  • Author_Institution
    School of Communication and Information Engineering, Shanghai University, Shanghai, China
  • fYear
    2009
  • fDate
    7-9 Dec. 2009
  • Firstpage
    98
  • Lastpage
    101
  • Abstract
    In this paper, based on the Xilinx Virtex-5 FPGA, a video input and output interface circuitry including a video input daughter-card, a simple de-interlacing module, a YCrCb to RGB color space conversion module and a video output interface are designed. This System constitutes a basic infrastructure for our HD video post processing processor which is under development.
  • Keywords
    Xilinx Virtex-5 FPGA; YCrCb to RGB color space conversion; de-interlacing; video post processing pipeline;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Wireless Mobile and Computing (CCWMC 2009), IET International Communication Conference on
  • Conference_Location
    Shanghai, China
  • Type

    conf

  • Filename
    5522065
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=523469