DocumentCode
523991
Title
The aethereal network on chip after ten years: Goals, evolution, lessons, and future
Author
Goossens, Kees ; Hansson, Andreas
Author_Institution
Eindhoven Univ. of Technol., Eindhoven, Netherlands
fYear
2010
fDate
13-18 June 2010
Firstpage
306
Lastpage
311
Abstract
The goals for the Æthereal network on silicon, as it was then called, were set in 2000 and its concepts were defined early 2001. Ten years on, what has been achieved? Did we meet the goals, and what is left of the concepts? In this paper we answer those questions, and evaluate different implementations, based on a new performance: cost analysis. We discuss and reflect on our experiences, and conclude with open issues and future directions.
Keywords
network-on-chip; Æthereal network; aethereal network on chip; Bandwidth; Costs; Delay; Digital TV; Network-on-a-chip; Performance analysis; SDRAM; Scalability; US Department of Transportation; Wires; Network on chip; circuit switching; rate control;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2010 47th ACM/IEEE
Conference_Location
Anaheim, CA
ISSN
0738-100X
Print_ISBN
978-1-4244-6677-1
Type
conf
Filename
5523545
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