Single stage static level shifter design for subthreshold to I/O voltage conversion

A static subthreshold to I/O voltage level shifter is proposed. The proposed circuit employs a diode-connected pull-up transistor stack and a feedback structure to alleviate the drive strength requirement on the pull-down transistors. The proposed level shifter achieves less than 6 FO4 inverter delay under process and temperature variation when converting the input from 300 mV to 2.5 V. Compared to a conventional DCVS design, the new design consumes 8 times less power and is 10% faster under room temperature.