Thermal analysis of 8-T SRAM for nano-scaled technologies

Author

Meterelliyoz, Mesut ; Kulkarni, Jaydeep P. ; Roy, Kaushik

Author_Institution

Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA

fYear

2008

fDate

11-13 Aug. 2008

Firstpage

123

Lastpage

128

Abstract

Different sections of a cache memory may experience different temperature profiles depending on their proximity to other active logic units such as the execution unit. In this paper, we perform thermal analysis of cache memories under the influence of hot-spots. In particular, 8-T SRAM bit cell is chosen because of its robust functionality at nano-scaled technologies. Thermal map of entire 8-T SRAM cache is generated using hierarchical compact thermal models while solving the leakage and temperature self consistently. The impact of spatial temperature variations on 8T-SRAM parameters such as local bitline (LBL) sensing delay, noise robustness and bitcell stability are evaluated for 45nm/32nm/22nm bulk CMOS technology nodes. The effectiveness of variable keeper sizing on LBL sensing delay is analyzed. It is predicted that at 22 nm node, the leakage induced temperature rise has severe effects on the 8-T SRAM characteristics.

Keywords

CMOS memory circuits; SRAM chips; cache storage; delays; integrated circuit noise; nanoelectronics; thermal analysis; 8-T SRAM bit cell; LBL sensing delay; active logic units; bitcell stability; bulk CMOS technology nodes; cache memory; hierarchical compact thermal models; leakage induced temperature; local bitline sensing delay; nanoscaled technology; noise robustness; size 22 nm; size 32 nm; size 45 nm; spatial temperature variations; temperature profiles; thermal analysis; thermal map; variable keeper sizing; CMOS technology; Cache memory; Logic; Noise robustness; Performance analysis; Random access memory; Robust stability; Semiconductor device modeling; Temperature dependence; Temperature sensors; 8T-SRAM; compact thermal models; leakage; noise robustness; thermal analysis; variable keeper;

fLanguage

English

Publisher

ieee

Conference_Titel

Low Power Electronics and Design (ISLPED), 2008 ACM/IEEE International Symposium on

Conference_Location

Bangalore

Print_ISBN

978-1-4244-8634-2

Electronic_ISBN

978-1-60558-109-5

Type

conf

DOI

10.1145/1393921.1393953

Filename

5529054