A SysML model for code correction and detection systems

The Unified Modeling Language (UML) is a well known approach for specifying and designing software components. UML for hardware designs of embedded systems is also possible in the simulation process, when the hardware is in the software form. The large number of tools for UML, the generl adoption of this technology for heterogeneous system design and verification, makes UML a very powerful and robust design instrument. Based on UML, the SysML [1] language has been developed in order to support all the details of system designs. SysML extends UML towards the systems engineering domain. As a good example, a SysML model for hardware components that perform error detection and correction, based on polynomial registers mod p(x), will be presented. The approach is justified as efficient and flexible.