DocumentCode :
525894
Title :
An intergrated DC-DC converter with digital one-step dead-time correction
Author :
Zhao, A. ; Shorten, A. ; Nishio, H. ; Ng, W.T.
Author_Institution :
Edward S. Rogers Sr. Electr. & Comput. Eng. Dept., Univ. of Toronto Toronto, Toronto, ON, Canada
fYear :
2010
fDate :
6-10 June 2010
Firstpage :
57
Lastpage :
60
Abstract :
This paper presents an integrated 6V to 1V, 3W DC-DC converter with a novel one-step dead-time digital controller designed for 40V 0.25μm CMOS technology. The proposed one-step digital control scheme can continuously optimize the dead-times for the turn-on and turn-off of the power MOSFETs. Comparing with previously reported dead-time optimization techniques, this work can achieve quick and accurate adjustment of the dead-time with minimum chip area overhead. A 10-bit hybrid DPWM modulation circuit, a NOR gate and a level shifter circuit are integrated with the output stage to detect and measure the duration of the unwanted low-side MOSFET body-diode conduction. Experimental results shows a 1% to 5% power conversion efficiency improvement.
Keywords :
CMOS integrated circuits; DC-DC power convertors; logic gates; power MOSFET; pulse width modulation; CMOS technology; DPWM modulation; MOSFET body-diode conduction; NOR gate; digital one-step dead-time correction; intergrated DC-DC converter; level shifter circuit; power 3 W; power MOSFET; size 0.25 mum; voltage 1 V to 6 V; voltage 40 V; word length 10 bit; CMOS technology; Circuits; Current measurement; DC-DC power converters; Delay; Digital control; MOSFETs; Power conversion; Semiconductor device measurement; Time measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices & IC's (ISPSD), 2010 22nd International Symposium on
Conference_Location :
Hiroshima
ISSN :
1943-653X
Print_ISBN :
978-1-4244-7718-0
Type :
conf
Filename :
5543984
Link To Document :
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