Title :
Simulation of off-state degradation at high temperature in High Voltage NMOS transistor with STI architecture
Author :
Bach, Stephane ; Borella, Fabio ; Cambieri, Juri ; Pizzo, Giansalvo ; Causio, Alessandro ; Atzeni, Laura ; Riccardi, Damiano ; Zullino, Lucia ; Croce, Giuseppe ; Nannipieri, Alessandro
Author_Institution :
STMicroelectronics, Technol. R&D, Milan, Italy
Abstract :
After High Temperature Reverse Bias stress, high voltage NMOS transistors designed in 0.18 μm technologies with STI architecture suffer from Rdson degradation, which can result in long term product failure. In this work, a degradation model is proposed based on results obtained on TCAD simulation, showing very good agreement with the experimental values.
Keywords :
MOSFET; circuit simulation; technology CAD (electronics); Rdson degradation model; STI architecture; TCAD simulation; high temperature reverse bias stress; high voltage NMOS transistor; long term product failure; off-state degradation simulation; shallow trench isolation architecture; size 0.18 mum; Breakdown voltage; CMOS technology; Degradation; Hot carriers; Isolation technology; MOSFETs; Power semiconductor devices; Stress; Temperature; Testing;
Conference_Titel :
Power Semiconductor Devices & IC's (ISPSD), 2010 22nd International Symposium on
Conference_Location :
Hiroshima
Print_ISBN :
978-1-4244-7718-0
Electronic_ISBN :
1943-653X
