• DocumentCode
    526586
  • Title

    The design and implementation of plate-profile information collecting and processing system based on FPGA

  • Author

    Hong-zhe, Xu ; Jian-xin, Wang ; Lu-meng, Chao

  • Author_Institution
    Xi´´an Jiao Tong Univ., Xi´´an, China
  • Volume
    3
  • fYear
    2010
  • fDate
    9-11 July 2010
  • Firstpage
    541
  • Lastpage
    545
  • Abstract
    this paper shows the design and implementation of a video capturing and processing system, which can collect plate-profile information and process image in the spatial domain. Strategy of buffer storage is used in the collecting part; read and write two SRAM at the same time to improve the data throughput. In the processing part using Synchronous FIFO to implement sliding window whose function is to filter image in spatial domain. In the tests, using this system to process plate-profile information gets good result; frame rate can reach 25fps, also meet the need of real-time requirements and have much more obvious advantages than processing image by software programming.
  • Keywords
    SRAM chips; buffer storage; field programmable gate arrays; video signal processing; FPGA; buffer storage; collect plate-profile information; data throughput; software programming; spatial domain; synchronous FIFO; video capturing; video processing system; Field programmable gate arrays; IP networks; Ice; Image edge detection; Software; Switches; FPGA; Synchronous FIFO; video capturing and processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Science and Information Technology (ICCSIT), 2010 3rd IEEE International Conference on
  • Conference_Location
    Chengdu
  • Print_ISBN
    978-1-4244-5537-9
  • Type

    conf

  • DOI
    10.1109/ICCSIT.2010.5564638
  • Filename
    5564638