The design of motion compensation IP core based on SOPC

In this paper motion compensation IP core design based on SOPC technology is researched, which achieves the software hardware co-design method in video decoding to overcome the drawbacks of the software decoding and hardware decoding. The design of hardware modularization which is based on the motion compensation algorithm in MPEG-4 video decoding standard is completed by using verilog HDL language. Build SOPC system with soft-core processor NiosII, complete the Avalon bus interface design under SOPC Builder, and read data from the bus in effective way that use burst transmission mode of master port, to achieve the IP core design successfully. By testing and validating, the results show that the decoding rate of the system increases by 35% after using the motion compensation IP core in the SOPC video decoding system. It greatly improves real-time performance of video decoding.