Rate Switching Filters: Model and Efficient Approximation

A filter model is proposed, allowing for the realization of a digital structure that computes a decimated version of the output signal. Each time the sampling rate is switched, pre-calculated coefficients are loaded by the processor in parallel to computing a filter state that fits the new rate. Sufficient conditions for the existence of the new state are given: holding these conditions, the sampling rate can be varied at runtime without introducing spurious transients in the output signal. The equivalence between the proposed filter model and existing polyphase networks for the efficient computation of decimated signals is discussed. If the input is null, the rate-switching structure performs a fraction of the computations that equals the decimation factor. Otherwise, the same efficiency can be achieved by linearly interpolating in between decimated input values, at the cost of introducing an error in the output signal. Particularly in the second-order case, an efficient rate-switching structure can be figured out capable of producing an error-free output also in presence of an input which is not null.