High-speed comparators for SAR ADCs in 130 nm BiCMOS

This paper presents high-speed low-power differential comparators in 130 nm SiGe BiCMOS technology. The high sensitivity of 1.25 mV at 1 GHz clock frequency is suited for high-speed high-resolution SAR analog-to-digital converters. Power consumption is in the range from 250 μW to 840 μW with a 1.2 V supply voltage. The decision is taken by a regenerative latch with cross coupled transistors. Four versions of the comparator are implemented where different latch types are used: One latch with p-channel MOS transistors, one with n-channel MOS transistors and two ones with npn transistors. Measurements of the bit error rate and the dead time as well as eye diagrams are presented.