DocumentCode
528632
Title
Improving neural network methods for time domain fault analysis of nonlinear analog circuits by feature selection
Author
Ossowski, Marek
Author_Institution
Inst. of Circuit Theor., Meas. Sci. & Mater. Sci., Tech. Univ. of Lodz, Lodz, Poland
fYear
2010
fDate
7-10 Sept. 2010
Firstpage
301
Lastpage
304
Abstract
The strategy of feature extraction and selection enabling to improve efficiency of fault detection methods for analog nonlinear circuits is presented in the paper. Simple algorithm for data selection, ensuring the proper diagnosis of faulty circuits having limited number of testing points, under assumption, that complex signal processing tools are not available, is proposed and tested.
Keywords
analogue circuits; circuit testing; electronic engineering computing; fault diagnosis; feature extraction; network analysis; neural nets; signal processing equipment; time-domain analysis; complex signal processing tool; data selection; fault detection method; feature extraction; feature selection; neural network method; nonlinear analog circuit; time domain fault analysis; Analog circuits; Artificial neural networks; Circuit faults; Classification algorithms; Feature extraction; Signal processing algorithms; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals and Electronic Systems (ICSES), 2010 International Conference on
Conference_Location
Gliwice
Print_ISBN
978-1-4244-5307-8
Electronic_ISBN
978-83-9047-4-2
Type
conf
Filename
5595188
Link To Document