DocumentCode :
528633
Title :
An analogue integrated circuits yield optimisation with the use of genetic algorithm
Author :
Jantos, Piotr ; Grzechca, Damian ; Rutkowski, Jerzy
Author_Institution :
Div. of Circuits & Signals Theor., Silesian Univ. of Technol., Gliwice, Poland
fYear :
2010
fDate :
7-10 Sept. 2010
Firstpage :
293
Lastpage :
296
Abstract :
Design for Manufacturability and Yield is one of the most important concepts in analogue integrated circuits manufacturing. The process of adjusting the nominal values of circuit parameters allows for partial immunisation of its performance against deviations in value of the circuit´s parameters. This paper proposes the use of an evolutionary tool, the genetic algorithm, for design centring. The process is based on encompassing an assumed integrated model and Monte Carlo analysis. The presented design centring method has been verified with the use of an example circuit, i.e. a CMOS operational amplifier.
Keywords :
CMOS analogue integrated circuits; Monte Carlo methods; design for manufacture; genetic algorithms; integrated circuit manufacture; operational amplifiers; CMOS operational amplifier; Monte Carlo analysis; analogue integrated circuits manufacturing; circuit parameters; design centring method; design for manufacturability; evolutionary tool; genetic algorithm; integrated model; optimisation; partial immunisation; Analog integrated circuits; Couplings; Evolutionary computation; Integrated circuit modeling; Monte Carlo methods; Optimization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals and Electronic Systems (ICSES), 2010 International Conference on
Conference_Location :
Gliwice
Print_ISBN :
978-1-4244-5307-8
Electronic_ISBN :
978-83-9047-4-2
Type :
conf
Filename :
5595190
Link To Document :
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