An analogue electronic circuits diagnosis with the use of evolutionary algorithms

There is a method of global parametric faults location in analogue integrated circuits presented in this paper. Circuit Under Test is diagnosed in the time domain. The method is based on a utilisation of the tested device response and its derivative base features, i.e. following maxima and minima. The set consisted of base features is transformed into an advanced feature. Base features and the advanced feature are used in the process of faults location. There is a method allowing for testing time optimisation presented in this paper. The fault dictionary is constructed with the use of two evolutionary algorithms, i.e. gene expression programming and differential evolution. The presented diagnosis method has been verified with an exemplary circuit - a CMOS operational amplifier.