• DocumentCode
    528802
  • Title

    Diet SODA: A power-efficient processor for digital cameras

  • Author

    Seo, Sangwon ; Dreslinski, Ronald G. ; Woh, Mark ; Chakrabarti, Chaitali ; Mahlke, Scott ; Mudge, Trevor

  • Author_Institution
    Department of Electrical and Computer Engineering, University of Michigan, Ann Arbor, MI 48109
  • fYear
    2010
  • fDate
    18-20 Aug. 2010
  • Firstpage
    79
  • Lastpage
    84
  • Abstract
    Power has become the most critical design constraint for embedded handheld devices. This paper proposes a power-efficient SIMD architecture, referred to as Diet SODA, for DSP applications. The key design idea is to apply near-threshold operation on a single instruction and multiple data (SIMD) architecture to significantly lower the power consumption. The major features of Diet SODA are very wide SIMD width, scatter/gather data prefetcher, and dual mode operation. A case study was performed on digital still camera (DSC) applications; the results show that Diet SODA achieves ∼130x better performance and ∼340x better energy efficiency than a DSP solution.
  • Keywords
    Computer architecture; Image color analysis; Kernel; Pipelines; Pixel; Signal processing; Signal processing algorithms; SIMD; digital still cameras; dynamic voltage scaling; near-threshold;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Low-Power Electronics and Design (ISLPED), 2010 ACM/IEEE International Symposium on
  • Conference_Location
    Austin, TX, USA
  • Print_ISBN
    978-1-4244-8588-8
  • Type

    conf

  • Filename
    5599024