DocumentCode :
528844
Title :
Distributed DVFS using rationally-related frequencies and discrete voltage levels
Author :
Chabloz, J.M. ; Hemani, A.
Author_Institution :
KTH - School of ICT Stockholm, Sweden
fYear :
2010
fDate :
18-20 Aug. 2010
Firstpage :
247
Lastpage :
252
Abstract :
We have defined a flexible latency-insensitive design style called Globally Ratiochronous Locally Synchronous (GRLS), based on quantized voltage levels and rationally-related clock frequencies. In this paper we present the infrastructure necessary to enable Distributed DVFS in such a system and analyze its overheads, quantitatively showing how, with minimal overheads, we obtain energy benefits that are close to those of a totally ideal GALS approach. The benefits that we show, coupled with the complexity and performance benefits of GRLS, which we briefly analyze, show how this approach is a strong competitor to GALS.
Keywords :
Clocks; Energy consumption; Frequency conversion; Rails; Switches; Synchronization; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Low-Power Electronics and Design (ISLPED), 2010 ACM/IEEE International Symposium on
Conference_Location :
Austin, TX, USA
Print_ISBN :
978-1-4244-8588-8
Type :
conf
Filename :
5599067
Link To Document :
بازگشت