DocumentCode
528845
Title
NBTI-aware DVFS: A new approach to saving energy and increasing processor lifetime
Author
Basoglu, Mehmet ; Orshansky, Michael ; Erez, Mattan
Author_Institution
The University of Texas at Austin - Electrical and Computer Engineering Department, Austin, TX 78712
fYear
2010
fDate
18-20 Aug. 2010
Firstpage
253
Lastpage
258
Abstract
Scaling process technology necessitates the introduction of wide design-time guard bands that ensure lifetime reliability as circuits wear out over time. In this paper, we show how to utilize this knowledge of the guard band and a predictive model to absolutely improve processor power consumption and lifetime without impacting the processor performance against Negative Bias Temperature Instability (NBTI) degradation. For the first time, we evaluate the long-term potential and impact of NBTI-aware job-to-core mapping quantitatively and account for process variations in the system. Our approach saves up to 16% of the dynamic energy consumed and improve lifetime by two years.
Keywords
Calibration; Degradation; Mathematical model; Multicore processing; Stress; Threshold voltage; Voltage control; DVFS; Energy efficiency; NBTI; Process variation; Wearout;
fLanguage
English
Publisher
ieee
Conference_Titel
Low-Power Electronics and Design (ISLPED), 2010 ACM/IEEE International Symposium on
Conference_Location
Austin, TX, USA
Print_ISBN
978-1-4244-8588-8
Type
conf
Filename
5599068
Link To Document