DocumentCode :
52904
Title :
III-V Junctionless Gate-All-Around Nanowire MOSFETs for High Linearity Low Power Applications
Author :
Yi Song ; Chen Zhang ; Dowdy, Ryan ; Chabak, Kelson ; Mohseni, Parsian K. ; Wonsik Choi ; Xiuling Li
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
Volume :
35
Issue :
3
fYear :
2014
fDate :
Mar-14
Firstpage :
324
Lastpage :
326
Abstract :
III-V junctionless gate-all-around (GAA) nanowire MOSFETs (NWFETs) are experimentally demonstrated for the first time. Source/drain resistance and thermal budget are minimized by regrowth using metalorganic chemical vapor deposition instead of implantation. The fabricated short channel (Lg=80 nm) GaAs GAA NWFETs with extremely scaled NW width (WNW=9 nm) exhibit excellent gm linearity at biases as low as 300 mV, characterized by the high third intercept point (2.6 dbm). The high linearity is insensitive to the bias conditions, which is favorable for low power applications.
Keywords :
III-V semiconductors; MOSFET; chemical vapour deposition; gallium arsenide; low-power electronics; nanowires; GaAs; III-V junctionless GAA NWFET; III-V junctionless gate-all-around nanowire MOSFET; NW width; gallium arsenide GAA NWFET; high-linearity low-power application; metalorganic chemical vapor deposition; source-drain resistance; thermal budget; third intercept point; Degradation; Gallium arsenide; Linearity; Logic gates; MOSFET; Radio frequency; GaAs MOSFET; Linearity; gate-all-around (GAA); implantation-free junctionless transistor; nanowire; regrowth source/drain;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2013.2296556
Filename :
6705581
Link To Document :
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