An ultra-low power CMOS PTAT current source

Author

Christoffersen, Carlos ; Toombs, Greg ; Manzak, Ali

Author_Institution

Dept. of Electr. Eng., Lakehead Univ., Thunder Bay, ON, Canada

fYear

2010

fDate

1-9 Oct. 2010

Firstpage

35

Lastpage

40

Abstract

A low-voltage, ultra-low-power sub-threshold proportional to absolute temperature (PTAT) current source is proposed. The new topology generates the PTAT current from the ratio between the drain currents of two transistors in subthreshold operation. Linearity is analyzed and a compensation strategy to improve it is developed. This is the first time such a design scheme is presented. Total current drain for the circuit is approximately 3.8 μA with a minimum supply voltage of 1 V and a PSRR greater than 50 dB at room temperature. The linear range is at least from -40°C to 125°C. The performance of the proposed reference is compared with several existing designs.

Keywords

CMOS integrated circuits; low-power electronics; power supply circuits; CMOS PTAT current source; PSRR; compensation strategy; design scheme; drain current; linearity; proportional to absolute temperature; subthreshold operation; temperature -40 degC to 125 degC; ultra-low power current source; voltage 1 V; Gain; Linearity; Logic gates; Mirrors; Resistors; Sensors; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Argentine School of Micro-Nanoelectronics Technology and Applications (EAMTA), 2010

Conference_Location

Montevideo

Print_ISBN

978-1-4244-6747-1

Electronic_ISBN

978-987-1620-14-2

Type

conf

Filename

5606380