DocumentCode
532584
Title
Switch-level design of ternary adiabatic counter based on T-operation
Author
Gao Hong ; Wang Pengjun ; Mei Fengna
Author_Institution
Inst. of Circuits & Syst., Ningbo Univ., Ningbo, China
Volume
1
fYear
2010
fDate
22-24 Oct. 2010
Abstract
By studying the design principles of multi-valued logic and characteristics of adiabatic circuits, a novel design scheme of ternary adiabatic counter was proposed in this paper. Guided by switch-signal theory, the scheme derives the switch-level structures of ternary adiabatic T-operation circuit, and using bootstrapped NMOS to realize energy input and recovery, then the ternary adiabatic counter is realized by the optimum ternary adiabatic T-operation network which adopting the method of splitting the truth table. Finally, the PSPICE simulation using TSMC 0.25μm CMOS technology validated that the designed circuits have correct logic function and the character of clearly low power.
Keywords
CMOS integrated circuits; logic design; multivalued logic circuits; PSPICE simulation; TSMC 0.25μm CMOS technology; adiabatic circuit; bootstrapped NMOS; logic function; multivalued logic; size 0.25 micron; switch-level design; switch-signal theory; ternary adiabatic T-operation circuit; ternary adiabatic counter; Switches; T-operation; circuit design; counter; low power; switch-signal theory;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Application and System Modeling (ICCASM), 2010 International Conference on
Conference_Location
Taiyuan
Print_ISBN
978-1-4244-7235-2
Electronic_ISBN
978-1-4244-7237-6
Type
conf
DOI
10.1109/ICCASM.2010.5620784
Filename
5620784
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