DocumentCode :
533083
Title :
A study on MAC sublayer of OBU in ETC system
Author :
Wei, Zhang ; Yue-Hui, Li ; Wei-Ping, Jing
Author_Institution :
Jiangsu Province ASIC Key Lab., Nantong Univ., Nantong, China
Volume :
13
fYear :
2010
fDate :
22-24 Oct. 2010
Abstract :
In order to achieve the core chip which has the advantages of low cost, low power consumption and high integration in electronic toll collection system, the implementation of medium access control (MAC) sublayer protocol of the dedicated short-range communication is studied. Based on the analysis of working principle of MAC sublayer, the MAC sublayer is divided into three modules. Finally, the working process of every modules are realized in Verilog HDL, and the simulation results show that they are in accordance with the protocol.
Keywords :
access protocols; hardware description languages; radiocommunication; ETC system; MAC sublayer protocol; OBU; core chip; dedicated short-range communication; electronic toll collection system; medium access control sublayer protocol; power consumption; verilog HDL; Hardware design languages; Media Access Protocol; Physical layer; Receivers; Simulation; Transmitters; Verilog HDL; electronic toll collection(ETC); medium access control (MAC);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Application and System Modeling (ICCASM), 2010 International Conference on
Conference_Location :
Taiyuan
Print_ISBN :
978-1-4244-7235-2
Electronic_ISBN :
978-1-4244-7237-6
Type :
conf
DOI :
10.1109/ICCASM.2010.5622787
Filename :
5622787
Link To Document :
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