DocumentCode :
533347
Title :
TLP characterization for testing system level ESD performance
Author :
Jahanzeb, Agha ; Lou, Lifang ; Duvvury, Charvaka ; Torres, Cynthia ; Morrison, Scott
Author_Institution :
Texas Instrum., Dallas, TX, USA
fYear :
2010
fDate :
3-8 Oct. 2010
Firstpage :
1
Lastpage :
8
Abstract :
A case study of system level ESD protection is presented for a scheme requiring compliance to the IEC 61000-4-2 standard. The behavior of the circuit was analyzed using TLP testing under biased conditions. Compared to the unbiased case, it was found that the response of the circuit becomes erratic at the lower current levels under the external bias leading to an unexpected early failure during the system level ESD test. Improving the triggering response of the ESD clamp to overcome this effect in the presence of an external bias greatly enhanced the system level ESD performance. The biased TLP analysis was found to be a useful tool to study the IEC performance.
Keywords :
IEC standards; electrostatic discharge; integrated circuit testing; transmission lines; ESD clamp; IEC 61000-4-2 standard; TLP testing characterization; biased TLP analysis; system level ESD testing performance; transmission line pulse testing; Clamps; Delay; Electrostatic discharge; IEC; IEC standards; Rails; Stress;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Overstress/ Electrostatic Discharge Symposium (EOS/ESD), 2010 32nd
Conference_Location :
Reno, NV
Print_ISBN :
978-1-58537-182-2
Electronic_ISBN :
978-1-58537-182-2
Type :
conf
Filename :
5623714
Link To Document :
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