DocumentCode
533385
Title
Anomalous ESD failures in NLDMOS during reverse recovery
Author
Hirano, Tetsuro ; Hase, Mitsuo ; Ogura, Takashi ; Tanaka, Shuji ; Fujiwara, Shuji
Author_Institution
SANYO Semicond. Co., Ltd., Gunma, Japan
fYear
2010
fDate
3-8 Oct. 2010
Firstpage
1
Lastpage
6
Abstract
Anomalous NLDMOS behavior under ESD stresses is investigated. Negative MM test results show failures at low stress voltage and local distributions of destruction spots. TCAD simulations clarified that the reverse recovery current during the MM stress causes parasitic NPN turn-on and effectively lowers the trigger voltage (Vt1).
Keywords
MOS integrated circuits; electrostatic discharge; failure analysis; large scale integration; ESD failures; ESD stresses; LSI; TCAD simulations; anomalous NLDMOS behavior; negative MM test; reverse recovery current; trigger voltage; Doping; Electrostatic discharge; Integrated circuit modeling; Lattices; Semiconductor process modeling; Stress; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/ Electrostatic Discharge Symposium (EOS/ESD), 2010 32nd
Conference_Location
Reno, NV
Print_ISBN
978-1-58537-182-2
Electronic_ISBN
978-1-58537-182-2
Type
conf
Filename
5623755
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