DocumentCode
533389
Title
A new method to evaluate effectiveness of CDM ESD protection
Author
Yuanzhong Zhou ; Hajjar, J.-J. ; Ellis, D.F. ; Olney, A.H. ; Liou, J.J.
Author_Institution
Analog Devices Inc., Wilmington, MA, USA
fYear
2010
fDate
3-8 Oct. 2010
Firstpage
1
Lastpage
8
Abstract
A new methodology for evaluating the effectiveness of CDM protection is presented. VFTLP measurements are performed on structures composed of an ESD protection device in parallel with a gate monitor device; a MOS transistor or inverter. Parametric shifts in threshold voltage, VTH, as well as drain saturation current, IDD, of the MOS monitor device are measured to continuously gauge the extent of the damage resulted from a CDM-like fast transient.
Keywords
MOSFET; electrostatic discharge; invertors; transient analysis; transmission lines; CDM ESD protection device; CDM-like fast transient; MOS monitor device; MOS transistor; VFTLP measurements; drain saturation current; gate monitor device; inverter; parametric shifts; threshold voltage; Current measurement; Electrostatic discharge; Leakage current; Logic gates; MOS devices; Monitoring; Stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/ Electrostatic Discharge Symposium (EOS/ESD), 2010 32nd
Conference_Location
Reno, NV
Print_ISBN
978-1-58537-182-2
Type
conf
Filename
5623759
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