• DocumentCode
    533434
  • Title

    Simple two-priority, low-jitter scheduler

  • Author

    Olesinski, Wladek ; Eberle, Hans

  • Author_Institution
    Sun Labs., Oracle, Menlo Park, CA, USA
  • fYear
    2010
  • fDate
    25-26 Oct. 2010
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Many papers on emulations of Generalized Processor Sharing (GPS) have been published. The algorithms and their implementations are often very complex and/or generate a bursty output. In this paper, we present a simple two-priority scheduler that can be easily implemented in hardware, making it especially interesting for Networks on Chips (NoCs), and other applications dealing with stringent resource constraints.
  • Keywords
    jitter; network-on-chip; scheduling; generalized processor sharing; network on chip; two-priority low-jitter scheduler; Complexity theory; Delay; Global Positioning System; Hardware; Jitter; Radiation detectors; Round robin; Algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Architectures for Networking and Communications Systems (ANCS), 2010 ACM/IEEE Symposium on
  • Conference_Location
    La Jolla, CA
  • Print_ISBN
    978-1-4244-9127-8
  • Electronic_ISBN
    978-1-4503-0379-8
  • Type

    conf

  • Filename
    5623859
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=533434