Title :
Design of a configurable multichannel interrupt controller
Author :
Chipin, Wei ; Li Zhao lin ; Qingwei, Zheng ; Jianfei, Ye ; Shenglong, Li
Author_Institution :
Tsinghua Nat. Lab. for Inf. Sci. & Technol., Tsinghua Univ., Beijing, China
Abstract :
Flexibility of interrupt controller is more and more concerned with the development of System-on-Chip(SoC). In this paper, a configurable multichannel interrupt controller is proposed. Interrupt priority is configurable for processor by accessing registers through ARB bus interface. Combination interrupt is also realized for one Interrupt Service Routing (ISR) to service multiple interrupts at a time. Up to 60 interrupt inputs and 12 interrupt channels are supported in this design. The synthesis time delay in SMIC 0.13um CMOS technology is 2.43ns.
Keywords :
CMOS integrated circuits; microcontrollers; peripheral interfaces; system-on-chip; AHB bus interface; CMOS technology; ISR; SMIC; SoC; accessing registers; combination interrupt; configurable multichannel interrupt controller; interrupt channels; interrupt priority; interrupt service routing; synthesis time delay; system-on-chip; CMOS integrated circuits; CMOS technology; Program processors; Interrupt controller; Multi-channel; Priority; SoC;
Conference_Titel :
Circuits,Communications and System (PACCS), 2010 Second Pacific-Asia Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-7969-6
DOI :
10.1109/PACCS.2010.5626805
